During ESD, large currents can flow through an Integrated Circuit (IC), potentially causing damage. To avoid this damage, protection circuits/elements are added. A lot of products require low capacitance at the input and high ESD performance. One of the lowest cap solutions for ESD protection is dual diode. This is the standard approach to protect an Input/Output (IO) circuitry. A typical protection circuit 100 uses a dual diode as a very classic ESD solution as shown in FIG. 1. The IO to be protected is connected to a first voltage potential, pad 102. Element 101 is a first power supply potential, an IC power supply (VDD) line and element 103 is a second power supply potential, ground (GND). A diode 104 is placed between the IO 102 and the VDD 101 to conduct current from the IO 102 to VDD 101 and a diode 105 is placed to conduct the current from the GND 103 to the IO 102. The diode 104 is normally a P+ junction connected to the IO 102 in an N-Well connected to the VDD 101. The diode 105 is normally an N+ junction connected to the IO 102 and the P-Well or P-substrate connected to GND 103.
For an ESD stress case from the IO 102 (positive zap) to the VDD 101 or from the IO 102 to the GND 103, all the current will flow through the diode 104 while there will be no current flowing through the diode 105. Similarly, in the case from stress from the GND 103 to the IO 102 or from the VDD 101 to the IO 102, all the current will flow through diode 105 while there will be no current flowing through the diode 105.
The maximum current that a diode can handle before failure is proportional with the area of the junction connected to pad. This area of the junction is the N+ junction in the case of diode 105 and P+ junction in the case of the diode 104. So each of these junctions must have a minimum area to handle the ESD current. Furthermore, the capacitance of the dual diode at the input is also proportional with the junction area. In this case the total capacitance seen at the IO pad 102 will be determined by the sum of the two junction areas of the diodes 104 and 105.
The disadvantage of utilizing a dual diode in a protection circuit is that all the current must flow though one junction. For example, for the stress case between the IO 102 and the VDD 101, the junction of the diode 105 does not provide any assistance in ESD protection, however, it does contribute to the total capacitance. Thus, there is a need in the art to be able to provide an ESD protection circuit such that the junction must be designed to handle all the current in the ESD protection circuit.